Figure 1: Open Loop Test Circuit.
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
4.7KΩ
ERROR AMP.
ADJUST
4.7KΩ
2N2222
100KΩ
1KΩ
ISENSE
ADJUST
5KΩ
RT
COMP
VFB
ISENSE
RT/CT
VREF
8
1
7
2
UC3842A
3
6
4
5
0.1µF
Vi
OUTPUT
0.1µF
GROUND
CT
D95IN343
A
1W
1KΩ
VREF
Vi
OUTPUT
GROUND
High peak currents associatedwith capacitive loads
necessitate careful grounding techniques. Timing
and bypass capacitors should be connected close
to pin 5 in a single point ground. The transistor and
5 KΩ potentiometerareusedto samplethe oscillator
waveform and apply an adjustable ramp to pin 3.
Figure 2: Oscillator Frequency vs Timing Resis-
tance
fo
(Hz)
D96IN362
1M
100K
10K
1CnTF=470pF
2.2nF
4.7nF
Figure 3: Maximum Duty Cycle vs Timing Resis-
tor
fo
(Hz)
D96IN363
80
60
40
20
1K
300
1K
3K
10K
30K
RT(Ω)
0
300
1K
3K
10K
30K
RT(Ω)
5/15