74LVC00A(2004) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

74LVC00A
(Rev.:2004)

LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE

STMicroelectronics 

74LVC00A

LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE

HIGH PERFORMANCE

s 5V TOLERANT INPUTS

s HIGH SPEED: tPD = 4.3ns (MAX.) at VCC = 3V

s POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

t(s) |IOH| = IOL = 24mA (MIN) at VCC = 3V

s PCI BUS LEVELS GUARANTEED AT 24 mA

c s BALANCED PROPAGATION DELAYS:

du tPLH ≅ tPHL

ro s OPERATING VOLTAGE RANGE:

VCC(OPR) = 1.65V to 3.6V (1.2V Data

P Retention)

te s PIN AND FUNCTION COMPATIBLE WITH

le 74 SERIES 00

o s LATCH-UP PERFORMANCE EXCEEDS

s 500mA (JESD 17)

b s ESD PERFORMANCE:

O HBM > 2000V (MIL STD 883 method 3015);

) - MM > 200V

t(s DESCRIPTION

uc The 74LVC00A is a low voltage CMOS QUAD

d 2-INPUT NAND GATE fabricated with sub-micron

ro silicon gate and double-layer metal wiring C2MOS

P technology. It is ideal for 1.65 to 3.6 VCC

SOP

TSSOP

Table 1: Order Codes

PACKAGE

SOP

TSSOP

T&R

74LVC00AMTR

74LVC00ATTR

operations and low power and low noise

applications.

It can be interfaced to 5V signal environment for

inputs in mixed 3.3/5V system.

It has more speed performance at 3.3V than 5V

AC/ACT family, combined with a lower power

consumption.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Obsolete Figure 1: Pin Connection And IEC Logic Symbols

July 2004

Rev. 5

1/11

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