MT6260A
GSM/GPRS/EDGE-RX SOC Processor Technical Brief
v1.1 Confidential A
Figure 13. PCHR block diagram. .......................................................................................................... 73
Figure 14. Charging states diagram...................................................................................................... 74
Figure 15. Diagram of MT6260A 2G RFSYS ........................................................................................ 79
Figure 16. System diagram of Bluetooth RF transceiver ...................................................................... 84
Figure 17. Block diagram of hardware top-level architecture ............................................................... 88
Figure 18. Outlines and dimension of TFBGA 9.6mm*8.6mm, 199-ball, 0.5 mm pitch package ......... 93
Figure 19 Mass production top marking of MT6260A .......................................................................... 94
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