AD9117BCPZRL7 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9117BCPZRL7 Datasheet PDF : 52 Pages
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Data Sheet
AD9114/AD9115/AD9116/AD9117
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3.3 V, IxOUTFS = 20 mA, maximum sample rate, unless otherwise noted.
Table 2.
Parameter
DAC CLOCK INPUT (CLKIN)
VIH
VIL
Maximum Clock Rate
SERIAL PERIPHERAL INTERFACE
Maximum Clock Rate (SCLK)
Minimum Pulse Width High
Minimum Pulse Width Low
Minimum SDIO and to SCLK Setup, tDS
Minimum SCLK to SDIO Hold, tDH
Maximum SCLK to Valid SDIO, tDV
Minimum SCLK to Invalid SDIO, tDNV
INPUT DATA
1.8 V Q Channel or DCLKIO Falling Edge
Setup
Hold
1.8 V I Channel or DCLKIO Rising Edge
Setup
Hold
3.3 V Q Channel or DCLKIO Falling Edge
Setup
Hold
3.3 V I Channel or DCLKIO Rising Edge
Setup
Hold
DVDDIO = 3.3 V
VIH
VIL
DVDDIO = 1.8 V
VIH
VIL
Min
Typ
Max
Unit
2.1
3
0
V
0.9
V
125
MSPS
25
MHz
20
ns
20
ns
10
ns
5
ns
20
ns
5
ns
0.25
ns
1.2
ns
0.13
ns
1.1
ns
−0.2
ns
1.5
ns
−0.2
ns
1.6
ns
2.1
3
0
V
0.9
V
1.2
1.8
V
0
0.5
V
Rev. D | Page 7 of 52
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