MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
MAX11044/
MAX11044B
(TQFN-EP)
24, 30, 41, 47
25, 31, 40, 46
32
34
37
39
36
—
—
—
—
MAX11045/
MAX11045B
(TQFN-EP)
24, 30, 41, 47
25, 31, 40, 46
29
32
34
37
36
39
42
—
—
MAX11046/
MAX11046B
(TQFN-EP)
24, 30, 41, 47
25, 31, 40, 46
26
29
32
34
36
37
39
42
45
52
52
52
53
53
54
54
54
54
55
55
55
56
56
56
26, 29, 42, 45
26, 45
—
—
—
—
NAME
Pin Description (continued)
FUNCTION
AVDD
AGND
CH0
CH1
CH2
CH3
REFIO
CH4
CH5
CH6
CH7
WR
CS
RD
DB15
DB14
I.C.
EP
Analog Supply Input. Bypass AVDD to AGND with a
0.1μF capacitor at each AVDD input.
Analog Ground. Connect all AGND inputs together.
Channel 0 Analog Input
Channel 1 Analog Input
Channel 2 Analog Input
Channel 3 Analog Input
External Reference Input/Internal Reference Output.
Place a 0.1μF capacitor from REFIO to AGND.
Channel 4 Analog Input
Channel 5 Analog Input
Channel 6 Analog Input
Channel 7 Analog Input
Active-Low Write Input. Drive WR low to write to the
ADC. Configuration registers are loaded on the rising
edge of WR.
Active-Low Chip-Select Input. Drive CS low when
reading from or writing to the ADC.
Active-Low Read Input. Drive RD low to read from the
ADC. Each rising edge of RD advances the channel
output on the data bus.
16-Bit Parallel Data Bus Digital Output Bit 15
16-Bit Parallel Data Bus Digital Output Bit 14
Internally Connected. Connect to AGND.
Exposed Pad. Internally connected to AGND. Connect to
a large ground plane to maximize thermal performance.
Not intended as an electrical connection point.
Maxim Integrated
11