74LVQ174 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
74LVQ174 Datasheet PDF : 6 Pages
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Functional Description
Truth Table
The LVQ174 consists of six edge-triggered D-type flip-flops
with individual D inputs and Q outputs. The Clock (CP) and
Inputs
Master Reset (MR) are common to all flip-flops. Each D
MR
CP
D
input’s state is transferred to the corresponding flip-flop’s
L
output following the LOW-to-HIGH Clock (CP) transition. A
LOW input to the Master Reset (MR) will force all outputs
H
LOW independent of Clock or Data inputs. The LVQ174 is
H
X
X
H
L
useful for applications where the true output only is
H
L
X
required and the Clock and Master Reset are common to
all storage elements.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
Logic Diagram
Output
Q
L
H
L
Q
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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