HMP8112 View Datasheet(PDF) - Harris Semiconductor
Part Name
Description
Manufacturer
HMP8112 Datasheet PDF : 40 Pages
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HMP8112
Functional Block Diagrams (Continued)
ADDRESS
POINTER
ADDRESS
POINTER
CONTROL
DATA BUS
CONTROL
REGISTERS
....
0
....
1
....
.
....
.
.
.
25
CbCr[7:0]
SERIAL SHIFT
REGISTER
Y[7:0]
A0 SCL SDA
I2C CONTROL INTERFACE
OEN
32 X 16
DEEP
FIFO
R
E
G
I
S
T
8
E
8/16 OUTPUT R
SELECT
R
E
M
U
X
G
I
S
T
8
E
R
OUTPUT INTERFACE
CbCr[7:0]
Y[7:0]
DVLD
ACTIVE
Schematic
LUMA0
LUMA1
LUMA2
U1
C3
1.0µF
5 LIN2
C5
1.0µF
C4
1.0µF
6 LIN1
7 LIN0
R3 R4 R5
75 75 75 LOW PASS FILTER
CRCB7 51 CR_CB7
CRCB6 50 CR_CB6
CRCB5 49 CR_CB5
CRCB4 48 CR_CB4
CRCB3 47 CR_CB3
CRCB2 45 CR_CB2
CRCB1 43 CR_CB1
CR_CB10. .71
CR_CB10. .71
CHROMA
R6
75
C6
1.0µF
R7
680
C2
15pF
L1
82µH
C1
15pF
19
CIN
9 L_OUT
8 L_ADIN
R8
5.62K
CRCB0 42 CR_CB0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
64
63
60
58
57
56
55
54
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
ACTIVE 65
Y10. .71
Y10. .71
VCC VCC VCC VCC VCC VCC VCC
R11 R12 R13 R14 R15 R16
10K 10K 10K 10K 10K 4K
R17
4K
ACTIVE
C9
0.22µF
C8
0.01µF
C7
0.01µF
77
DVLD 66
76
29
LAGC_CAP
LCLAMP_CAP
CCLAMP_CAP
FIELD
HSYNC
VSYNC
67
71
70
27
WPE
DVLD
FIELD
HDRIVE
VDRIVE
AVCC
28
GAIN_CNTL
RESET 34
SDA 40
41
SCL
RESET
SDA
SCL
R1
1K
C10
R9
78
DEC_T
30
DEC_L
C11
C12
38
CLK
13
CLK
36
TEST
VCC
27MHz
R10
50
C13
27MHz
0.1µF
0.1µF 0.1µF
5K
R18
R2
15pF
10K
10
JP1
JUMPER
5
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