ICS8520DYI-02LFT View Datasheet(PDF) - Integrated Circuit Solution Inc

Part Name

Description

Manufacturer

ICS8520DYI-02LFT

LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER

Integrated Circuit Solution Inc 

Integrated

Circuit

Systems, Inc.

ICS8520I-02

LOW SKEW, 1-TO-16

DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS8520I-02.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS8520I-02 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.

NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

• Power (core)MAX = VDD_MAX * IDD_MAX = 3.465V * 190mA = 658.4mW

• Power (outputs)MAX = 32.6mW/Loaded Output pair

If all outputs are loaded, the total power is 16 * 32.6mW = 521.6mW

Total

Power

_MAX

(3.465V,

with

all

outputs

switching)

=

658.4mW

+

521.6mW

=

1180mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the

device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.

The equation for Tj is as follows: Tj = θJA * Pd_total + TA

Tj = Junction Temperature

θJA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a

moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 22.6°C/W per Table 6 below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 1.18W * 22.6°C/W = 111.7°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,

and the type of board (single layer or multi-layer).

TABLE 6. THERMAL RESISTANCE θJA FOR 48-PIN TQFP, FORCED CONVECTION

θJA by Velocity (Linear Feet per Minute)

Multi-Layer PCB, JEDEC Standard Test Boards

0

27.6°C/W

200

22.6°C/W

500

20.7°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

8520DYI-02

www.icst.com/products/hiperclocks.html

8

REV. B NOVEMBER 16, 2005

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