5.2 Typical Application Circuit (Part B)
GSPI_GS4911B[3:0]
SCLK_GS4911B
SDIN_GS4911B
SDOUT_GS4911B
CSn_GS4911B
(NP)
(NP)
PCLK OUTPUT (To GS1582)
CONTROL SIGNALS
GENLOCKn
RESETn
JTAG/HOSTn
GENLOCK CONTROL
RESET
JTAG/HOST
38pF
27.000MHZ
24pF
0R
1M
0R
LOCK_LOST_A
REF_LOST_A
1V8_PCLK_A
GND_VPLL/APLL_A
VDD_XTAL_A
GND_XTAL_A
1V8_PCLK_A
GND_VPLL/APLL_A
GND_VPLL/APLL_A
1V8_PCLK_A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LOCK_LOST
REF_LOST
VID_PLL_VDD
VID_PLL_GND
XTAL_VDD
X1
X2
XTAL_GND
CORE_GND
ANALOG_VDD
NC
ANALOG_GND
AUD_PLL_GND
AUD_PLL_VDD
10FID
HSY NC
65 GND_PAD
GS4911B
LVDS/PCLK3_GND
PCLK3
PCLK3
LVDS/PCLK3_VDD
CORE_VDD
TIMING_OUT8
TIMING_OUT7
TIMING_OUT6
TIMING_OUT5
TIMING_OUT4
IO_VDD
TIMING_OUT3
TIMING_OUT2
TIMING_OUT1
ASR_SEL0
ASR_SEL1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND_Bridge/PhS_A
1V8_Bridge/PhS_A
VDD_Core_A
VDD_IO_A
22R F/DE_GS4911B
22R V/VSY NC_GS4911B
22R H/HSY NC_GS4911B
+3.3V
10k
FVH OUTPUT[2:0] (To GS1582)
FVH TIMING INPUT[2:0]
VIDEO STANDARD SELECT[5:0]
H_IN
V_IN
F_IN
WCLK_GS4911B
22R
ACLK_GS4911B
22R
MCLK_GS4911B
22R
ANALOG POWER FILTERING
VDD_IO_A
VDD_IO_A
IO_VDD
0R
DECOUPLING @ PINS 18,31,38,50,62
100nF
10uF 10uF
100nF
10nF 10nF 10nF 10nF 10nF
GS4911B AUDIO CLOCKS[2:0]
(To GS1582 and audio
sy nchronization dev ices.)
+3.3V
100nF 10uF
+1.8V
100nF 10uF
+1.8V
100nF 10uF
+1.8V
100nF 10uF
VDD_XTAL_A
0R
10uF 100nF
0R
DECOUPLING
@ PIN 5
10nF
VDD_XTAL_A
VDD_XTAL_A
GND_XTAL_A
GND_XTAL_A
1V8_PCLK_A
0R
10uF 100nF
0R
DECOUPLING
@ PIN 45
10nF
GND_XTAL_A
1V8_PCLK_A
1V8_PCLK_A
GND_VPLL/APLL_A
GND_VPLL/ALL_A
GND_VPLL/ALL_A
1V8_Bridge/PhS_A
1V8_Bridge/PhS_A
DECOUPLING
@ PIN 54
1V8_Bridge/PhS_A
0R
10uF 100nF
0R
10nF
GND_Bridge/PhS_A
GND_Bridge/PhS_A
GND_Bridge/PhS_A
VDD_Core_A
DECOUPLING @
VDD_Core_A
PINS 26,44
0R
VDD_Core_A
10uF 100nF
10nF 10nF
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleanerTM
Data Sheet
40117 - 4
December 2011
110 of 115