854110AYILFT View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

854110AYILFT

2.5V Differential LVDS Clock Buffer

Integrated Device Technology 

ICS854110I Data Sheet

2.5V DIFFERENTIAL LVDS CLOCK BUFFER

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the

bond wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj = θJA * Pd_total + TA

Tj = Junction Temperature

θJA = Junction-to-Ambient Thermal Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming no air flow and

a multi-layer board, the appropriate value is 65.7°C/W per Table 6A below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.179W * 65.7°C/W = 96.8°C. This is below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of

board (multi-layer).

Table 6A. Thermal Resistance θJA for 32 Lead LQFP, Forced Convection

θJA by Velocity

Meters per Second

0

Multi-Layer PCB, JEDEC Standard Test Boards

65.7°C/W

1

55.9°C/W

2.5

52.4°C/W

Table 6B. Thermal Resistance θJA for 32 Lead VFQFN, Forced Convection

θJA by Velocity

Meters per Second

0

Multi-Layer PCB, JEDEC Standard Test Boards

37.0°C/W

1

32.4°C/W

2.5

29.0°C/W

ICS854110AKI REVISION B JANUARY 27, 2011

15

©2011 Integrated Device Technology, Inc.

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