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WM8956 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
Manufacturer
WM8956 Datasheet PDF : 80 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
WM8956
PIN DESCRIPTION
Production Data
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
NAME
MICBIAS
LINPUT3 / JD2
LINPUT2
LINPUT1
RINPUT1
RINPUT2
RINPUT3 / JD3
DCVDD
DGND
DBVDD
MCLK
BCLK
DACLRC
DACDAT
GPIO1
DNC
SCLK
SDIN
SPK_RN
SPKGND2
SPKVDD2
SPK_RP
SPK_LN
SPKGND1
SPK_LP
SPKVDD1
VMID
AGND
HP_R
OUT3
HP_L
AVDD
GND_PADDLE
TYPE
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Supply
Supply
Supply
Digital Input
Digital Input / Output
Digital Input / Output
Digital Input
Digital Input / Output
Do not connect
Digital Input
Digital Input/Output
Analogue Output
Supply
Supply
Analogue Output
Analogue Output
Supply
Analogue Output
Supply
Analogue Output
Supply
Analogue Output
Analogue Output
Analogue Output
Supply
DESCRIPTION
Microphone bias
Left channel line input /
Left channel positive differential MIC input /
Jack detect input pin
Left channel line input /
Left channel positive differential MIC input
Left channel single-ended MIC input /
Left channel negative differential MIC input
Right channel single-ended MIC input /
Right channel negative differential MIC input
Right channel line input /
Right channel positive differential MIC input
Right channel line input /
Right channel positive differential MIC input /
Jack detect input pin
Digital core supply
Digital ground (Return path for both DCVDD and DBVDD)
Digital buffer (I/O) supply
Master clock
Audio interface bit clock
Audio interface DAC left / right clock
DAC digital audio data
GPIO1 pin
Leave this pin floating
Control interface clock input
Control interface data input / 2-wire acknowledge output
Right speaker negative output
Ground for speaker drivers 2
Supply for speaker drivers 2
Right speaker positive output
Left speaker negative output
Ground for speaker drivers 1
Left speaker positive output
Supply for speaker drivers 1
Midrail voltage decoupling capacitor
Analogue ground (Return path for AVDD)
Right output (Line or headphone)
Mono, left, right or buffered midrail output for capless mode
Left output (Line or headphone)
Analogue supply
Die Paddle (Note 1)
Note:
1. It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB.
2. Refer to the application note WAN_0118 on “Guidelines on How to Use QFN Packages and Create Associated PCB
Footprints”
w
PD, November 2011, Rev 4.1
4

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