ISL88017IHTZ-T View Datasheet(PDF) - Renesas Electronics
Part Name
Description
Manufacturer
ISL88017IHTZ-T Datasheet PDF : 8 Pages
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ISL88016, ISL88017
Absolute Maximum Ratings
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on Any Pin with Respect to GND . . . . . . . . . . . -1.0V to +7V
D.C. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Absolute Maximum Ratings indicate limits beyond which permanent damage to the device and impaired reliability may occur. These are stress ratings
provided for information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification are not implied.
For guaranteed specifications and test conditions, see Electrical Specifications. The guaranteed specifications apply only for the test conditions listed. Some
performance characteristics may degrade when the device is not operated under the listed test conditions.
Electrical Specifications Over the recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
BIAS
VDD
IDD
Supply Voltage Range
ISL88016 Supply Current
VDD > VTH
ISL88017 Supply Current
VDD > VTH
VOLTAGE THRESHOLD
VDD = 5.0V
VDD = 3.3V
VDD = 2.5V
VDD = 1.8V
VDD = 5.0V
VDD = 3.3V
VDD = 2.5V
VDD = 2.25V
1.6
4.3
3.1
3.1
2.5
4.0
3.2
3.2
3.0
VTH VDD Voltage Trip Point
See Power-On Reset Voltage
-2
Setting Table on page 3
VTHHYST Hysteresis at VTH Input
1
Temperature = +25°C
RESET
VOL ISL88016 Reset Output Voltage Low
VDD < VTH, Sinking 0.225mA
ISL88017 Reset Output Voltage Low
VDD < VTH, Sinking 0.225mA
VOH Reset Output Voltage High
VDD VTH
tPOR POR Time-Out Delay
140
tRST VTH Low to Reset Asserted Delay
VDD Open
CLOAD Load Capacitance on Reset Pin
MANUAL RESET
0.20
0.20
VDD
200
0.01
5
VMR
tMR
RPU
VSET
MR Input Voltage
MR Minimum Pulse Width
Integrated RST/MR Pull-Up Resistor
10
100
IVSET
VVSET
VIL
VIH
VSET Current
VSET Open Pin Voltage
VSET Input Voltage Low
VSET Input Voltage High
VSET = Open
0.5VDD
0.9 x VDD
MAX
5.5
6
4.9
4.5
4.4
8.5
8.5
6.5
5.4
+2
0.5
0.5
280
100
1
0.1VDD
UNITS
V
µA
µA
µA
µA
µA
µA
µA
µA
%
%
V
V
V
ms
µs
pF
mV
µs
k
µA
V
V
V
FN6141 Rev 1.00
August 5, 2015
Page 4 of 8
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