AD5100YRQZ-1RL7 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD5100YRQZ-1RL7

System Management IC with Factory Programmed Quad Voltage Monitoring and Supervisory Functions

Analog Devices 

Parameter

LOW VOLTAGE MONITORING INPUTS

V3MON, V4MON

V3MON Voltage Range

Input Resistance

V3MON Threshold Tolerance

(See Figure 10 and Table 6)

V3MON Hysteresis

V4MON Voltage Range4

Input Resistance

V4MON Threshold Tolerance

(See Figure 12 and Table 6)

V4MON Hysteresis

RESET

RESET Hold Time Tolerance

(See Figure 10, Figure 12, and Table 8)

V3MON/V4MON-to-RESET Delay

RESET Output Voltage High

RESET Output Voltage Low

RESET Output Short-Circuit Current5

Glitch Immune Time

V4OUT Maximum Output

V4OUT Propagation Delay

V4OUT Maximum Frequency

WDI (WATCHDOG INPUT)

WDI Programmable Timeout Tolerance

(see Figure 13 and Table 8)

WDI Pulse Width

Watchdog Initiated RESET Pulse Width

Watchdog Initiated SHDN

WDI Input Voltage Low

WDI Input Voltage High

WDI Input Current

MR (MANUAL RESET) INPUT

MR Input Voltage Low

MR Input Voltage High

Input Current

MR Pulse Width

MR Deglitching

MR-to-RESET Delay

Symbol

Conditions

AD5100

Min

Typ1 Max

Unit

V3MON

RIN_V3MON

ΔV3MON

V3_HYSTERESIS

V4MON

RIN_V4MON

ΔV4MON

V4_HYSTERESIS

TA = 25°C

TA = −40°C to +85°C

TA = −40°C to +125°C

TA = 25°C

TA = −40°C to +85°C

TA = −40°C to +125°C

ΔtRS_HOLD

tRS_DELAY

VOH

VOL

ISOURCE

tGLITCH

V4OUT_MAX

tV4OUT_DELAY

fV4OUT

TA = 25°C; does not apply to

Code 0x6 and Code 0x7

TA = −40°C to +125°C; does not

apply to Code 0x6 and Code 0x7

V3MON ≥ 4.38 V, ISOURCE = 120 μA

2.7 V < V3MON ≤ 4.38 V,

ISOURCE = 30 μA

2.3 V < V3MON ≤ 2.7 V,

ISOURCE = 20 μA

1.8 V ≤ V3MON ≤ 2.3 V,

ISOURCE = 8 μA

V3MON > 4.38 V, ISINK = 3.2 mA

V3MON < 4.38 V, ISINK = 1.2 mA

RESET = 0, V3MON = 5.5 V

RESET = 0, V3MON = 3.6 V

Open drain

Applies to RESET disabled only

ΔtWD

tWDI

tWDR

tWD_SHDN

VIL_WD

VIH_WD

TA = 25°C

TA = −40°C to +125°C

When no WDI

When no WDI activity > 4 tWD

WDI = V3MON

WDI = 0

VIL_MR

VIH_MR

tMR

tMR_GLITCH

tMR_DELAY

Rev. A | Page 5 of 36

2.0

5.5

V

85

130 180

kΩ

−2.5

+2.5

%

−2.75

−3

+2.75

%

+3

%

1.2

%

0.9

30

V

500

675 860

kΩ

−2.5

+2.5

%

−2.75

+2.75

%

−3

+3

%

5

%

−10

+10

%

−17

+17

%

60

μs

V3MON − 1.5

V

0.8 × V3MON

V

0.8 × V3MON

V

0.8 × V3MON

V

0.4

V

0.3

V

825

μA

400

μA

50

μs

5.5

V

70

μs

10

kHz

−10

+10

%

−17

+17

%

50

ns

tWD/50

ms

1

sec

0.3 × V3MON V

0.7 × V3MON

V

160

μA

−20

μA

0.7 × V3MON

1

100

1

0.3 × V3MON V

V

1

μA

μs

ns

μs

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