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SST65P542R View Datasheet(PDF) - Silicon Storage Technology

Part Name
Description
Manufacturer
SST65P542R
SST
Silicon Storage Technology 
SST65P542R Datasheet PDF : 41 Pages
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Data Sheet
2.0 PIN ASSIGNMENTS
Remote Controller MCU
SST65P542R
PB0
1
28
OSC1
PB1
2
27
OSC2
PB2
3
26
VDD
PB3
4
25
IRQ#
PB4
5
24
RST#
PB5
6
PB6
7
PB7
8
23
IRO
28-lead SOIC
22
VSS
Top View
21
LPRST#
PA0
9
20
PC3
PA1
10
19
PC2
PA2
11
18
PC1
PA3
12
17
PC0
PA4
13
16
PA7
PA5
14
15
PA6
1170 28-soic P01.5
FIGURE 2-1: PIN ASSIGNMENTS FOR 28-LEAD SOIC
2.1 Pin Descriptions
TABLE 2-1: PIN DESCRIPTIONS
Symbol
PA[7:0]
PB[7:0]
PC[3:0]
IRO
LPRST#
Type
I/O1
I/O
I/O
O
I
RST#
I
OSC1
I
OSC2
O
IRQ#
I
VDD
PWR
VSS
PWR
1. I = Input, O = Output
Name and Functions
Port A: The state of any pin in Port A is software programmable and every line is configured as
an input during any reset.
Port B: The state of any pin in Port B is software programmable and every line is configured as an
input during any reset. Each I/O line contains a programmable interrupt/pull-up for keyscan.
Port C: Every pin in Port C is a high-current pin and its state is software programmable. All lines
are configured as inputs during any reset.
IRO: Suitable for driving IR LED biasing logic, the IRO pin is the high-current source and sink out-
put of the carrier modulator transmitter subsystem. Default state is low after any reset.
Low-Power Reset: An active-low pin, LPRST# function sets MCU to low-power reset mode. Once the
device is in low-power reset mode, it is held in reset with all processor clocks and crystal oscillator halted.
An internal Schmitt trigger is included in the LPRST# pin to improve noise immunity.
Reset: By setting the RST# pin low, the device is reset to a default state. An internal Schmitt trig-
ger is included in the RST# pin to improve noise immunity.
Oscillator 1,2: These 2 pins interface with external oscillator circuits. A crystal
resonator, a ceramic resonator, or an external clock signal can be used.
Interrupt Request: The IRQ# is negative edge-sensitive triggered. An internal Schmitt trigger is
included in the IRQ# pin to improve noise immunity.
Power Supply: Supply Voltage (2.2-3.2V)
Ground: Circuit ground. (0V reference)
T2-1.14 1170
©2005 Silicon Storage Technology, Inc.
6
S71170-06-000
7/05

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