AD9775
AD9775–SPECIFICATIONS
DC SPECIFICATIONS (TMIN to TMAX, AVDD = 3.3 V, CLKVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 3.3 V, IOUTFS = 20 mA, unless
otherwise noted.)
Parameter
Min
Typ
Max
Unit
RESOLUTION
DC Accuracy1
Integral Nonlinearity
Differential Nonlinearity
14
Bits
–5
± 1.5 +5
LSB
–3
± 1.0 +3
LSB
ANALOG OUTPUT (for IR and 2R Gain Setting Modes)
Offset Error
Gain Error (With Internal Reference)
Gain Matching
Full-Scale Output Current2
Output Compliance Range
Output Resistance
Output Capacitance
Gain, Offset Cal DACs, Monotonicity Guaranteed
–0.02
–1.0
–1.0
2
–1.0
± 0.01
± 0.1
200
3
+0.02
+1.0
+1.0
20
+1.25
% of FSR
% of FSR
% of FSR
mA
V
kΩ
pF
REFERENCE OUTPUT
Reference Voltage
Reference Output Current3
1.14
1.20 1.26
V
100
nA
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance (REFLO = 3 V)
Small Signal Bandwidth
0.1
1.25
V
10
MΩ
0.5
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
Gain Drift (With Internal Reference)
Reference Voltage Drift
0
ppm of FSR/°C
50
ppm of FSR/°C
ppm/°C
POWER SUPPLY
AVDD
Voltage Range
Analog Supply Current (IAVDD)4
IAVDD in SLEEP Mode
CLKVDD
Voltage Range
Clock Supply Current (ICLKVDD)4
CLKVDD (PLL ON)
Clock Supply Current (ICLKVDD)
DVDD
Voltage Range
Digital Supply Current (IDVDD)4
Nominal Power Dissipation
PDIS5
PDIS IN PWDN
Power Supply Rejection Ratio—AVDD
OPERATING RANGE
3.1
3.3
3.5
V
72.5 76
mA
23.3 26
mA
3.1
3.3
3.5
V
8.5
mA
23.5
mA
3.1
3.3
3.5
V
34
41
mA
380
410
mW
1.75
W
6.0
mW
± 0.4
% of FSR/V
–40
+85
°C
NOTES
1Measured at IOUTA driving a virtual ground.
2Nominal full-scale current, IOUTFS, is 32× the IREF current.
3Use an external amplifier to drive any external load.
4100 MSPS fDAC with fOUT = 1 MHz, all supplies = 3.3 V, no interpolation, no modulation.
5400 MSPS fDAC = 50 MSPS, fS/2 modulation, PLL enabled.
Specifications subject to change without notice.
REV. 0
–3–