CXD1852Q
Pin No. Symbol
116 HRW
117 XHIRQ
118 XRST
25 BC
26 TCKI
27 TDI
28 TENA1
29 TDO
30 VST
I/O
Description
I
R/W signal input when the host interface operates in parallel mode. Serial
clock input in serial mode.
O
Interrupt request signal output. This pin functions as an open drain, and
should therefore be pulled up.
I
Hardware reset signal input. All operation is initialized by setting this pin
low.
— Test. Leave open.
— Test. Leave open.
— Test. Leave open.
— Test. Leave open.
— Test. Leave open.
— Test. Connect to ground.
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