APPLICATIONS INFORMATION
The AD9841A and AD9842A are complete Analog Front End
(AFE) products for digital still camera and camcorder appli-
cations. As shown in Figure 32, the CCD image (pixel) data is
buffered and sent to the AD984xA analog input through a series
input capacitor. The AD984xA performs the dc restoration,
CDS, gain adjustment, black level correction, and analog-to-
AD9841A/AD9842A
digital conversion. The AD984xA’s digital output data is then
processed by the image processing ASIC. The internal regis-
ters of the AD984xA—used to control gain, offset level, and other
functions—are programmed by the ASIC or microprocessor
through a 3-wire serial digital interface. A system timing gen-
erator provides the clock signals for both the CCD and the AFE.
CCD
VOUT
V-DRIVE
BUFFER
0.1F
AD984xA
CCDIN
ADCOUT
REGISTER
DATA
DIGITAL
OUTPUTS
SERIAL
INTERFACE
CCD
TIMING
CDS/CLAMP
TIMING
TIMING
GENERATOR
DIGITAL IMAGE
PROCESSING
ASIC
Figure 32. AD984xA System Applications Diagram
SERIAL
3
INTERFACE
3V
ANALOG SUPPLY
0.1F
1.0F
1.0F
0.1F
DATA 10
OUTPUTS
NC 1
NC 2
(LSB) D0 3
D1 4
D2 5
D3 6
D4 7
D5 8
D6 9
D7 10
D8 11
(MSB) D9
12
48 47 46 45 44 43 42 41 40 39 38 37
PIN 1
IDENTIFIER
AD9841A
TOP VIEW
(Not to Scale)
36 AUX1IN
AVSS
35
34 AUX2IN
33 AVDD2
32 BYP4
31 NC
30 CCDIN
29 BYP2
28 BYP1
27 AVDD1
26 AVSS
25 AVSS
13 14 15 16 17 18 19 20 21 22 23 24
0.1F
0.1F
3V
ANALOG SUPPLY
0.1F
0.1F
CCD SIGNAL
0.1F
0.1F
3V
ANALOG SUPPLY
3V
DRIVER
SUPPLY
0.1F
NC = NO CONNECT
8
CLOCK
INPUTS
0.1F
3V
ANALOG SUPPLY
Figure 33. AD9841A Recommended Circuit Configuration for CCD-Mode
REV. 0
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