AD9853AS Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9853AS Datasheet PDF : 31 Pages
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AD9853
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
Pin # Pin Name
Pin Function
44-Lead Metric Quad Flatpack
(S-44A)
1, 7, 9, 10,
36, 39, 44 DGND
Digital Ground
2, 8, 37,
40, 43 DVDD
Digital Supply Voltage
3
Control Bus Clock Bit Clock for Control Bus
Data
4
Control Bus Data In Control Bus Data In
5
FEC Enable
Enables/Disables FEC
6
Address Bit
Address Bit for Control Bus
11, 26, 31 Test Data Out
Factory Use—Serial Test Data
Out
12, 13 PLL GND
PLL Ground
14
PLL VCC
Supply Voltage for PLL
44 43 42 41 40 39 38 37 36 35 34
DGND 1
DVDD 2
CONTROL
BUS CLOCK
3
CONTROL
BUS DATA IN
4
FEC ENABLE 5
ADDRESS BIT 6
DGND 7
DVDD 8
PIN 1
IDENTIFIER
AD9853
TOP VIEW
(Not to Scale)
33 CA ENABLE
32 RESET
31 TEST DATA OUT
30 TEST DATA
ENABLE
29 TEST DATA IN
28 TEST LATCH
27 TEST CLK
26 TEST DATA OUT
15
PLL Filter
PLL Loop Filter Connection
DGND 9
25 IOUTB
OBSOLETE 16,19,23 AGND
17
NC
18
DAC Rset
20, 22 AVDD
21
DAC Baseline
24
IOUT
25
IOUTB
27
Test CLK
28
Test Latch
29
Test Data In
30
Test Data Enable
Analog Ground
No Connect
Rset Resistor Connection
Analog Supply Voltage
DAC Baseline Voltage
Analog Current Output of the
DAC
Complementary Analog Cur-
rent Output of the DAC
Factory Use—Scan Clock
Factory Use—Scan Latch
Factory Use—Serial Test Data
In
Factory Use—Serial Test Data
Enable, Grounded for Normal
DGND 10
TEST DATA
OUT
11
12 13 14 15 16 17 18 19 20 21 22
24 IOUT
23 AGND
NC = NO CONNECT
Operation
32
RESET
Master Device Reset Function
33
CA Enable
Cable Amplifier Enable
34
CA Clock
Cable Amplifier Serial Control
Clock
35
CA Data
Cable Amplifier Serial Control
Data
38
REF CLK IN
Reference Clock Input
41
Data In
Input Serial Data Stream
42
TXENABLE
Pulse that Frames the Valid
Input Data Stream
–4–
REV. C
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