M38220M3HFP Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

Número de pieza

componentes Descripción

Fabricante

M38220M3HFP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

MITSUBISHI MICROCOMPUTERS

3822 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

I/O PORTS

Direction Registers (ports P2, P41-P47, and

P5-P7)

The 3822 group has 49 programmable I/O pins arranged in seven

I/O ports (ports P0–P2, P41–P47 and P5-P7). The I/O ports P2,

P41–P47 and P5-P7 have direction registers which determine the

input/output direction of each individual pin. Each bit in a direction

register corresponds to one pin, and each pin can be set to be in-

put port or output port.

When “0” is written to the bit corresponding to a pin, that pin be-

comes an input pin. When “1” is written to that bit, that pin be-

comes an output pin.

If data is read from a pin set to output, the value of the port output

latch is read, not the value of the pin itself. Pins set to input are

floating. If a pin set to input is written to, only the port output latch

is written to and the pin remains floating.

Direction Registers (ports P0 and P1)

Ports P0 and P1 have direction registers which determine the in-

put/output direction of each individual port.

Each port in a direction register corresponds to one port, each port

can be set to be input or output. When “0” is written to the bit 0 of

a direction register, that port becomes an input port. When “1” is

written to that port, that port becomes an output port. Bits 1 to 7 of

ports P0 and P1 direction registers are not used.

Ports P3 and P40

These ports are only for input.

Pull-up/Pull-down Control

By setting the PULL register A (address 001616) or the PULL reg-

ister B (address 001716), ports except for port P40 can control

either pull-down or pull-up (pins that are shared with the segment

output pins for LCD are pull-down; all other pins are pull-up) with

a program.

However, the contents of PULL register A and PULL register B do

not affect ports programmed as the output ports.

b7

b0

PULL register A

(PULLA: address 001616)

P00–P07 pull-down

P10–P17 pull-down

P20–P27 pull-up

P34–P37 pull-down

P70, P71 pull-up

Not used (return “0” when read)

b7

b0

PULL register B

(PULLB : address 001716)

P41–P43 pull-up

P44–P47 pull-up

P50–P53 pull-up

P54–P57 pull-up

P60–P63 pull-up

P64–P67 pull-up

Not used (return “0” when read)

0: Disable

1: Enable

Note: The contents of PULL register A and PULL register B

do not affect ports programmed as the output port.

Fig. 14 Structure of PULL register A and PULL register B

17

Share Link: