THEORY OF OPERATION
The SP682's charge pump design is a simpli-
fied version of Sipex's original patented charge
pump design (5,306,954) except that it only
generates a negative output. The charge pump
requires external capacitors to store the charge.
Figure 1 shows the waveform found on the
negative side of capacitor C2. There is a free–
running oscillator, running at 12kHz, that con-
trols the two phases of the voltage shifting. A
description of each phase follows.
Phase 1
— VOUT charge storage — During this phase of
the clock cycle, the positive side of capacitors
tiChs1etrnaansndwsfCietcr2rhaeerddettioonCigti2ra–ol.ulSynidcnhcaaenrdCge2th+deitsocch+oa5nrgVnee.cotCneldC+ t1ios–
+5V, the voltage potential across capacitor C2
is now 10V.
Phase 2
— VOUT transfer — Phase two of the clock
connects the negative terminal of C2 to the
VOUT storage capacitor and the positive termi-
nal of C2 to ground, and transfers the generated
–l0V to C3. Simultaneously, the positive side
of capacitor C 1 is switched to +5V and the
negative side is connected to ground.
The oscillator frequency or clock rate for the
charge pump is designed for low power opera-
tion. The oscillator operates at a frequency of
about 12kHz (20kHz maximum) which con-
serves power as opposed to higher frequencies
which draws more power from VCC. The exter-
nal charge pump capacitors specified is 3.3µF
but the absolute minimum should be 1µF.
EFFICIENCY INFORMATION
A charge pump theoretically produces a doubled
voltage at 100% efficiency. However in the real
world, there is a small voltage drop on the output
which reduces the output efficiency. The SP682
can usually run 99.9% efficient without driving
a load. While driving a 1kΩ load, the SP682
remains at least 90% efficient.
Output Voltage Efficiency = VOUT / (–2*VCC);
VOUT = –2*VCC + VDROP
VDROP = (IOUT)*(ROUT)
Power Loss = IOUT*(VDROP)
The efficiency changes as the external charge
pump capacitors are varied. Larger capacitor
values will strengthen the output and reduce
output ripple usually found in all charge pumps.
Although smaller capacitors will cost less and
save board space, lower values will reduce the
output drive capability and also increase the
output ripple.
VCC = +5V
+
C1 –
–5V
+5V
+
C2 –
–5V
VOUT Storage Capacitor
–+
C3
Figure 4. Charge Pump Phase 1
VCC = +5V
Figure 3. Charge Pump Waveform
+
C1 –
+
C2 –
–10V
VOUT Storage Capacitor
–+
C3
Figure 5. Charge Pump Phase 2
SP682DS/07
SP682 Inverting Voltage Doubler
4
© Copyright 2000 Sipex Corporation