EP1C12T173C6 Ver la hoja de datos (PDF) - Altera Corporation

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componentes Descripción

Fabricante

EP1C12T173C6

Cyclone FPGA Family

Altera Corporation 

MultiTrack Interconnect

All embedded blocks communicate with the logic array similar to LAB-

to-LAB interfaces. Each block (i.e., M4K memory or PLL) connects to row

and column interconnects and has local interconnect regions driven by

row and column interconnects. These blocks also have direct link

interconnects for fast connections to and from a neighboring LAB.

Table 2–2 shows the Cyclone device's routing scheme.

Table 2–2. Cyclone Device Routing Scheme

Destination

Source

LUT Chain

v

Register Chain

v

Local Interconnect

vvvvv

Direct Link

Interconnect

v

R4 Interconnect

v

vv

C4 Interconnect

v

vv

LE

vvvvvv

M4K RAM Block

vvvv

PLL

vvv

Column IOE

v

Row IOE

vvv

Altera Corporation

January 2007

2–17

Preliminary

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