6
PIN DESCRIPTION
6.1 RES
This pin is reset signal input. When the pin is low, initialization of the chip is executed.
6.2 SDA, SCL & SA0
These pins are bi-directional data bus to be connected to the MCU in I2C-bus interface. Please refer to
the section: I2C Communication interface on page 22 for detail pin descriptions.
6.3 VDD
Power supply pin.
6.4 RVSS
Ground reference of Vref.
6.5 CVSS
Ground reference of analog circuitry.
6.6 VSS
Ground reference of logic circuitry.
6.7 VCI
Reference voltage input for internal DC-DC converter. The voltage of generated VCC equals to the
multiple factor (2X, 3X, 4X or 5X) times VCI with respect to VSS.
Note: Voltage at this input pin must be larger than or equal to VDD.
6.8 VOUT
This is the most positive voltage supply pin of the chip. It can be supplied externally or generated by the
internal regulator.
6.9 VL5, VL4, VL3 and VL2
LCD driving voltages. They can be supplied externally or generated by the internal bias divider. They
have the following relationship:
VOUT > VL5 > VL4 > VL3 > VL2 > VSS
Table 3 - VOUT > VL5 > VL4 > VL3 > VL2 > VSS Relationship
1 : a bias
VL5
(a-1)/a * VOUT
VL4
(a-2)/a * VOUT
VL3
2/a * VOUT
VL2
1/a * VOUT
a is equals to 9 at POR.
9
SSD0858
Rev 1.0
11/2002
SOLOMON