81C4256A-60 Ver la hoja de datos (PDF) - Fujitsu
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81C4256A-60 Datasheet PDF : 29 Pages
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June 1991
Edition 4.0
Not Recommended for New Design
DATA SHEET
MB81C4256A-60/-70/-80/-10
CMOS 256K x 4 BIT FAST PAGE MODE DYNAMIC RAM
The Fujitsu MB81C4256A is a CMOS, fully decoded dynamic RAM organized as
262,144 words x 4 bits. The MB81C4256A has been designed for mainframe
memories, buffer memories, video image memories requiring high speed and
high-band width output with low power dissipation, as well as for memory systems
of handheld computers which need very low power dissipation.
Fujitsu’s advanced three-dimensional stacked capacitor cell technology gives the
MB81C4256A high α-ray soft error immunity and extended refresh time. CMOS
technology is used in the peripheral circuits to provide low power dissipation and
high speed operation..
Parameter
MB81C4256A MB81C4256A MB81C4256A MB81C4256A
-60
-70
-80
-10
RAS Access Time
60 ns max
70 ns max.
80 ns max.
100 ns
Random Cycle Time 110 ns min. 125 ns min. 140 ns min. 170 ns min.
Address Access Time 30 ns max.
35 ns max.
40 ns max.
50 ns max.
CAS Access Time
15 ns max.
20 ns max.
20 ns max.
25 ns max.
Fast Page Mode
Cycle Time
40 ns min.
45 ns min.
45 ns min.
55 ns min.
Operating
Low
Current
Power
Dissipation Standby
Current
407 mW max. 374 mW max. 341 mW max. 297 mW max.
11 mW max. (TTL level) / 5.5 mW max. (CMOS level)
• 262,144 words x 4 bits organization
• Silicon gate, CMOS, 3-D stacked capacitor cell
• All inputs and outputs are TTL compatible
• 512 refresh cycles every 8.2 ms
• Early write or OE controlled write capability
• RAS only, CAS-before-RAS, or Hidden Refresh
• Fast page mode, Read-Modify-Write capability
• On-chip substrate bias generator for high performance
Absolute Maximum Ratings
Parameter
Symbol
Ratings
Unit
Voltage at any pin relative to VSS
VIN, VOUT
-1 to +7
V
Voltage of VCC supply relative to VSS
VCC
-1 to +7
V
Power dissipation
PD
1.0
W
Short circuit output current
—
50
mA
Storage temperature
TSTG
-55 to +125
°C
Note:
Permanent device damage may occur if absolute maximum ratings are exceeded.
Functional operation should be restricted to the conditions as detailed in the opera-
tional sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
© 1991 by FUJITSU LIMITED
DIP-20P-M03
LCC-26P-M04
ZIP-20P-M02
* FPT-24P-M04
* FPT-24P-M05
* Available for 70/80/100 ns versions
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However, it
is advised that normal precautions be taken to avoid application
of any voltage higher than maximum rated voltages to this high
impedance circuit.
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