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MAX31850KATB-T

Cold-Junction Compensated, 1-Wire Thermocouple-to-Digital Converters

Maxim Integrated 

MAX31850/MAX31851

Cold-Junction Compensated, 1-Wire

Thermocouple-to-Digital Converters

CRC Generation

CRC bytes are provided as part of the device’s 64-bit

ROM code, in the 9th byte of Scratchpad. The ROM code

CRC is calculated from the first 56 bits of the ROM code

and is contained in the most significant byte of the ROM.

The scratchpad CRC is calculated from the data in the

scratchpad, and therefore changes when the data in it

associated scratchpad changes. The CRC provides the

bus master with a method of data validation when data is

read from the device. To verify that data has been read

correctly, the bus master must recalculate the CRC from

the received data and then compare this value to either

the ROM code CRC (for ROM reads) or to the scratch-

pad CRC (for scratchpad reads). If the calculated CRC

matches the read CRC, the data has been received

error-free. The comparison of CRC values and the deci-

sion to continue with an operation are determined entirely

by the bus master. There is no circuitry inside the device

that prevents a command sequence from proceeding if

the device CRC (ROM or scratchpad) does not match the

value generated by the bus master.

The equivalent polynomial function of the CRC (ROM or

scratchpad) is:

CRC = X8 + X5 + X4 + 1

The bus master can recalculate the CRC and compare it

to the CRC values from the device using the polynomial

generator shown in Figure 5. This circuit consists of a

shift register and XOR gates, and the shift register bits

are initialized to 0. Starting with the least significant bit

of the ROM code or the least significant bit of byte 0 in

the scratchpad, one bit at a time should shifted into the

shift register. After shifting in the 56th bit from the ROM

or the most significant bit of byte 7 from the scratchpad,

the polynomial generator contains the recalculated CRC.

Next, the 8-bit ROM code or scratchpad CRC from the

device must be shifted into the circuit. At this point, if the

recalculated CRC was correct, the shift register contains

all zeros. Additional information about the Maxim 1-Wire

CRC is available in Application Note 27: Understanding

and Using Cyclic Redundancy Checks with Maxim iBut-

ton® Products.

1-Wire Bus System

The 1-Wire bus system uses a single bus master to

control one or more slave devices. The MAX31850/

MAX31851 are always a slave. When there is only one

slave on the bus, the system is referred to as a single-

drop system; the system is multidrop if there are multiple

slaves on the bus. All data and commands are transmit-

ted least significant bit first over the 1-Wire bus.

The following discussion of the 1-Wire bus system is

broken down into three topics: hardware configuration,

transaction sequence, and 1-Wire signaling (signal types

and timing).

Hardware Configuration

The 1-Wire bus has by definition only a single data line.

Each device (master or slave) interfaces to the data line

by using an open-drain or three-state port. This allows

each device to “release” the data line when the device

is not transmitting data so the bus is available for use by

another device. The device’s 1-Wire port (DQ) is open

drain with an internal circuit equivalent to that shown in

Figure 6.

POLYNOMIAL = X8 + X5 + X4 + 1

1ST

STAGE

2ND

STAGE

3RD

STAGE

4TH

STAGE

X0

X1

X2

X3

5TH

STAGE

X4

Figure 5. CRC Generator

iButton is a registered trademark of Maxim Integrated Products, Inc.

Maxim Integrated

6TH

STAGE

7TH

STAGE

8TH

STAGE

X5

X6

X7

X8

INPUT DATA

  14

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