ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
Data Sheet
5.0 MANUFACTURING SUPPORT
The ATA Flash Disk controller firmware contains a list of supported standard NAND flash media devices. Upon initial Power-
on, the controller scans all connected flash media devices and reads their device ID. If the device ID matches the listed flash
media devices in the ATA Flash Disk controller, the controller performs drive recognition based on the algorithm provided by
the flash media suppliers, including setting up the bad block table, executing all the necessary handshaking routines for flash
media support, and, finally, performing the low-level format. For Power-up timing specifications, please refer to Table 12-4.
Please contact SST for the most current list of supported NAND Flash media devices.
In the event that the NAND flash media device ID is not recognized by the ATA Flash Disk controller, the user has an option of
adding this device to the controller device table through the manufacturing interface provided by SST. Please contact SST for
the ATA Flash Disk controller manufacturing interface software. If the drive initialization fails, and a visual inspection is unable
to determine the problem, the SST55LD019A / SST55LD019B / SST55LD019C ATA Flash Disk controller provides a com-
prehensive interface for manufacturing flow debug. This interface not only allows debug of the failure and manual reset of the
initialization process, but also allows customization of user definable options.
5.1 ATA/IDE Interface
The ATA Flash Disk controller interface can be used for manufacturing support. SST provides an example of a DOS-based
solution (an executable routine downloadable from SST’s web site) for manufacturing debug and rework.
5.2 Serial Communication Interface (SCI)
For additional manufacturing flexibility, the SCI bus can be used for manufacturing error reporting. The SCI consists of 3
active signals: SCIDOUT, SCIDIN, and SCICLK.
6.0 EXTERNAL CLOCK INTERFACE
The external clock interface allows ATA Flash Disk controller operation from an external clock source generated by an RC cir-
cuit. Do not use a free running clock as input to the EXTCLKIN pin; an RC circuit must be used. Contact SST for reference
circuit and recommended external clock settings.
While the controller has an internal clock source, the external clock source allows slowing of the system clock operation to
limit the peak current and overcome additional bus loading.
The external clock interface consists of three signals: INTCLKEN, EXTCLKIN, and EXTCLKOUT. The INTCLKEN pin
selects between external and internal clock sources for the ATA Flash Disk controller. If this pin is pulled high before device
Power-on, then the internal clock source is selected; otherwise, the external clock source is selected. The EXTCLKIN and
EXTCLKOUT signals are the input and output clock signals, respectively.
7.0 SECURITY FEATURES
The SST55LD019A/B/C ATA Flash Disk Controller offers added data protection for applications where data security is of the
utmost importance. The secure features are:
1. Protection zones - Customer can enable up to 4 independent protection zones, with two options: Read-only or
Hidden (Read and Write protected) within each protected zone. If protection zones are not enabled the data is
unprotected (default configuration).
2. Password protection - Accessing information within the protected zones can be only achieved through a
customer-unique password.
3. Purge command - The system can issue a Purge command to erase all information stored in the flash media.
©2006 Silicon Storage Technology, Inc.
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S71241-04-000
12/06