74LV165PW,118 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74LV165PW,118 Datasheet PDF : 20 Pages
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Nexperia
74LV165
8-bit parallel-in/serial-out shift register
9,
W:
QHJDWLYH
SXOVH
90
9
WI
9,
SRVLWLYH
SXOVH
WU
90
9
W:
9,
*
9&&
92
'87
57
90
WU
WI
90
9(;7
5/
&/
5/
DDH
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 12. Test circuit for measuring switching times
Table 9. Test data
Supply voltage Input
< 2.7 V
2.7 V to 3.6 V
VI
VCC
2.7 V
4.5 V
VCC
tr, tf
2.5 ns
2.5 ns
2.5 ns
Load
CL
50 pF
50 pF, 15 pF
50 pF
RL
1 k
1 k
1 k
VEXT
tPHL, tPLH
open
open
open
74LV165
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 9 March 2016
© Nexperia B.V. 2017. All rights reserved
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