AD805
POWER
+
COMBINER
∑
DIFFERENTIAL
+
0.47µF
50Ω
DATAIN
100
CIRCUIT
SIGNAL
UNDER
SOURCE
+∑
50Ω
0.47µF
– POWER
COMBINER
TEST
DATAIN
10
75Ω
1.0µF 180Ω
POWER
SPLITTER
–5.2 V
GND
1
CCITT TYPE A MASK
OBSOLETE FILTER
NOISE
SOURCE
Figure 2. Bit Error Rate vs. Signal-to-Noise Ratio Test:
Block Diagram
0
–5
TYPE A
MASK
INPUT
JITTER
–10
1.3 UI
0.3 UI
INPUT JITTER
CCITT TYPE B
MASK
0.1
0.1
1
10
100
FREQUENCY – kHz
1000
Figure 5. Jitter Tolerance
E-1
5E-2
3E-2
2E-2
E-2
5E-3
3E-3
2E-3
3
5E-4
3E-4
2E-4
4
80mV
20mV
INPUT
JITTER
5
ECL
–15
6
8
–20
1
10
100
JITTER FREQUENCY – kHz
1000
10
12
E-15
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
S/N – dB
Figure 3. Jitter Transfer – Bandwidth
Figure 6. Bit Error Rate vs. Signal-to-Noise Ratio
0.3 UI
INPUT JITTER
–1
1.3 UI
INPUT JITTER
–3
CCITT
TYPE A MASK
INPUT JITTER
–5
1
JITTER FREQUENCY – kHz
10
Figure 4. Jitter Transfer – Peaking
VCC
2.0
IOUT
AD805
VEE = –5.2V
1.5
1.0
VCC – VOH
0.5
VOL – VEE
0
–200
0
200
400
IOUT – A
Figure 7. VCXO Control Voltage vs. Load
REV. 0
–5–