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AD8610BR-REEL7
(Rev.:RevD)

Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifier

Analog Devices 

AD8610/AD8620

supplies of ± 5 V. Figures 24 and 25 compare the load current

versus output voltage of AD8610/AD8620 and OPA627.

10

1

VEE

VCC

Programmable Gain Amplifier (PGA)

The combination of low noise, low input bias current, low input

offset voltage, and low temperature drift make the AD8610 a

perfect solution for programmable gain amplifiers. PGAs are often

used immediately after sensors to increase the dynamic range of

the measurement circuit. Historically, the large ON resistance of

switches, combined with the large IB currents of amplifiers,

created a large dc offset in PGAs. Recent and improved monolithic

switches and amplifiers completely remove these problems. A PGA

discrete circuit is shown in Figure 27. In Figure 27, when the 10 pA

bias current of the AD8610 is dropped across the (<5 Ω) RON of

the switch, it results in a negligible offset error.

When high precision resistors are used, as in the circuit of Figure 27,

the error introduced by the PGA is within the 1/2 LSB requirement

for a 16-bit system.

0.1

0.00001 0.0001

0.001

0.01

0.1

1

+5V

LOAD CURRENT – A

Figure 24. AD8610 Dropout from ±13 V vs. Load Current

VIN

100⍀

10

AD8610

U10

VOUT

5

10k⍀

VCC

5pF

–5V

VEE

1

0.1

0.00001 0.0001

0.001

0.01

0.1

1

LOAD CURRENT – A

Figure 25. OPA627 Dropout from ±15 V vs. Load Current

Although operating conditions imposed on the AD8610 (± 13 V)

are less favorable than the OPA627 (±15 V), it can be seen that the

AD8610 has much better drive capability (lower headroom to the

supply) for a given load current.

Operating with Supplies Greater than ± 13 V

The AD8610 maximum operating voltage is specified at ± 13 V.

When ± 13 V is not readily available, an inexpensive LDO can

provide ± 12 V from a nominal ± 15 V supply.

Input Offset Voltage Adjustment

Offset of AD8610 is very small and normally does not require

additional offset adjustment. However, the offset adjust pins can

be used as shown in Figure 26 to further reduce the dc offset. By

using resistors in the range of 50 kΩ, offset trim range is ±3.3 mV.

+VS

7

2

AD8610 6

3

1

5 R1

4

VOUT

G Y0

Y1

A0 A Y2

A1 B Y3

74HC139

+5V +5V

12

13

VL VDD

S1 3

1k⍀

1

IN1

D1 2

G=1

10k⍀

ADG452 S2 14

16

IN2

D2 15

G = 10

1k⍀

S3 11

9

IN3

D3 10

G = 100

100⍀

S4 6

8

IN4

VSS GND

D4 7

4

5

G = 1000

11⍀

–5V

Figure 27. High Precision PGA

1. Room temperature error calculation due to RON and IB:

∆VOS = IB × RON = 2 pA× 5 Ω = 10 pV

Total Offset = AD8610(Offset) + ∆VOS

Total Offset = AD8610(Offset _Trimmed) + ∆VOS

Total Offset = 5 µ V+ 10 pV ≅ 5 µ V

2. Full temperature error calculation due to RON and IB:

∆VOS (@ 85°C) = IB (@ 85°C) × RON (@ 85°C) =

250 pA × 15 Ω = 3.75 nV

3. Temperature coefficient of switch and AD8610/AD8620

combined is essentially the same as the TCVOS of the AD8610:

–VS

Figure 26. Offset Voltage Nulling Circuit

∆VOS /∆T(total) = ∆VOS /∆T( AD8610) + ∆VOS /∆T(IB × RON )

∆VOS /∆T(total) = 0.5 µ V/ °C+ 0.06 nV/ °C ≅ 0.5 µ V/ °C

–14–

REV. D

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