AD9508 Ver la hoja de datos (PDF) - Analog Devices
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AD9508 Datasheet PDF : 40 Pages
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Data Sheet
AD9508
EXTERNAL RESISTOR VALUES FOR PIN STRAPPING MODE
Table 7.
Parameter
EXTERNAL RESISTORS
Voltage Level 0
Voltage Level 1
Voltage Level 2
Voltage Level 3
Voltage Level 4
Voltage Level 5
Voltage Level 6
Voltage Level 7
Resistor Polarity
Pull down to ground
Pull down to ground
Pull down to ground
Pull down to ground
Pull up to VDD
Pull up to VDD
Pull up to VDD
Pull up to VDD
Min Typ Max Unit Test Conditions/Comments
Using 10% tolerance resistor
820
Ω
1.8
kΩ
3.9
kΩ
8.2
kΩ
820
Ω
1.8
kΩ
3.9
kΩ
8.2
kΩ
CLOCK OUTPUT ADDITIVE PHASE NOISE
Table 8.
Parameter
Min Typ Max
CLK-TO-HSTL OR LVDS ADDITIVE PHASE NOISE
CLK = 1474.56 MHz, OUTx = 1474.56 MHz
Divide Ratio = 1
At 10 Hz Offset
−88
At 100 Hz Offset
−100
At 1 kHz Offset
−109
At 10 kHz Offset
−116
At 100 kHz Offset
−135
At 1 MHz Offset
−144
At 10 MHz Offset
−148
At 100 MHz Offset
−149
CLK-TO-HSTL OR LVDS or CMOS ADDITIVE PHASE NOISE
CLK = 625 MHz, OUTx = 125 MHz
Divide Ratio = 5
At 10 Hz Offset
−114
At 100 Hz Offset
−125
At 1 kHz Offset
−133
At 10 kHz Offset
−141
At 100 kHz Offset
−159
At 1 MHz Offset
−162
At 10 MHz Offset
−163
At 20 MHz Offset
−163
CLK-TO-HSTL OR LVDS ADDITIVE PHASE NOISE
CLK = 491.52 MHz, OUTx = 491.52 MHz
Divide Ratio = 1
At 10 Hz Offset
−100
At 100 Hz Offset
−111
At 1 kHz Offset
−120
At 10 kHz Offset
−127
At 100 kHz Offset
−146
At 1 MHz Offset
−153
At 10 MHz Offset
−153
At 20 MHz Offset
−153
Unit Test Conditions/Comments
Input slew rate > 1 V/ns
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Input slew rate > 1 V/ns
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Input slew rate > 1 V/ns
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Rev. G | Page 9 of 40
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