AD9549(RevPrA) Ver la hoja de datos (PDF) - Analog Devices
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AD9549 Datasheet PDF : 78 Pages
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Preliminary Technical Data
AD9549
DC SPECIFICATIONS
Unless otherwise noted, AVDD=1.8±5%, AVDD3=3.3±5%, DVDD=1.8±5%, DVDD_I/O=3.3±5%.
Table 1.
Parameter
Min
Typ
Max
Unit Test Conditions/Comments
SUPPLY VOLTAGE
DVDD_I/O (pin 1)
3.135
3.30
3.465
V
(with respect to DVSS)
DVDD (pin 3, 5, 7)
1.71
1.80
1.89
V
(with respect to DVSS)
AVDD3 (pin 14, 46, 47, 49)
3.135
3.30
AVDD3 (pin 37)
1.71
3.30
AVDD (pin 11,19, 23-26,29,30,36,42,44,45,53) 1.71
1.80
3.465
3.465
1.89
V
(with respect to AVSS)
V
(with respect to AVSS)
V
(with respect to AVSS)
SUPPLY CURRENT
I-AVDD3 (pin 14)
I-AVDD3 (pin 37)
I-AVDD3 (pin 46, 47, 49)
I-AVDD (pin 36)
I-AVDD (pin 42)
I-AVDD (pin 11)
6
TBD
mA REFA, REFB Buffers
TBD
mA CMOS Output Clock Driver at 3.3V
25
TBD
mA DAC output current source
8
TBD
mA HSTL Output Clock Driver
10
TBD
mA FDBK
10
TBD
mA SYSCLK
I-AVDD (pin 19, 23-26, 29, 30, 44, 45)
170
TBD
mA aggregate analog supply
I-AVDD (pin 53)
I-DVDD (pin 3, 5, 7)
I-DVDD_I/O (pin 1)
35
TBD
mA DAC Power Supply
200
TBD
mA Digital Core
3
TBD
mA Digital I/O (varies dynamically)
LOGIC INPUTS (Except Pin 32)
Pins 56-61, 64, 9, 10, 54, 55, 63
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Current (IINH, IINL)
Maximum Input Capacitance (CIN)
CLKMODESEL (Pin 32) LOGIC INPUT
2.0
V
0.8
V
±30
±100
µA
At Vin=0V and Vin=DVDD_I/O
3
pF
Pin 32 only.
Input High Voltage (VIH)
Input Low Voltage (VIL)
Input Current (IINH, IINL)
Maximum Input Capacitance (CIN)
LOGIC OUTPUTS
1.4
V
0.4
V
±30
±100
µA
At Vin=0V and Vin=DVDD_I/O
3
pF
Pin 62, & bi-dir. pins 9, 10, 54, 55, 63
Output High Voltage (VOH)
Output Low Voltage (VOL)
REFERENCE INPUTS
2.7
V
IOH = 1 mA w/ VOH =DVDD_I/O-0.4V
0.4
V
IOL = 1mA w/ VOL =0.4V
Pins 12, 13, 15, 16
Input Capacitance
Input Resistance
Common Mode Input Voltage1
Differential Input Voltage Swing1
3
pF
16
KΩ Differential at Vbias=AVDD3-800mV
V
differential operation
mV differential operation
Input Voltage High (VIH)
Input Voltage Low (VIL)
Input Current
Internal Bias Voltage
AVDD3- AVDD3-
1600
800
AVDD3-
400
V
single-ended operation
V
single-ended operation
mA single-ended operation
mV programmable (see text)
FDBK INPUT
Pins 40, 41
Input Capacitance
Input Resistance
Common Mode Input Voltage2
Differential Input Voltage Swing2
3
pF
30
KΩ Differential
V
differential operation
mV differential operation
Rev. PrA | Page 5 of 78
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