ADP3180–Typical Performance Characteristics
4
3
2
1
0
0
50
100
150
200
250
300
RT VALUE – k⍀
SEE EQUATION 1 FOR FREQUENCIES NOT ON THIS GRAPH
TPC 1. Master Clock Frequency vs. RT
5.3
TA = 25؇C
4-PHASE OPERATION
5.2
5.1
5.0
4.9
4.8
4.7
4.6
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
MASTER CLOCK FREQUENCY – MHz
TPC 2. Supply Current vs. Master Clock Frequency
TEST CIRCUITS
ADP3180
12V
28 VCC
39k⍀
1k⍀
1.0V
18 CSCOMP
100nF
17 CSSUM
16 CSREF
19 GND
VOS =
CSCOMP – 1V
40
Test Circuit 1. Current Sense Amplifier VOS
ADP3180
12V
28 VCC
10k⍀
200k⍀
⌬V
200k⍀
100nF
1.0V
8 FB
9 COMP
18 CSCOMP
17 CSSUM
16 CSREF
19 GND
⌬VFB = FB⌬V = 80mV – FB⌬V = 0mV
Test Circuit 2. Positioning Voltage
ADP3180
1 VID4
VCC 28
2 VID3
PWM1 27
+
1F
6-BIT CODE
3 VID2
4 VID1
PWM2 26
PWM3 25
5 VID0
PWM4 24
6 VID5
SW1 23
7 FBRTN
SW2 22
8 FB
SW3 21
1k⍀
9 COMP
10 PWRGD
SW4 20
GND 19
1.25V
11 EN
12 DELAY
4.7nF 250k⍀ 13 RT
CSCOMP 18
CSSUM 17
CSREF 16
20k⍀
14 RAMPADJ
ILIMIT 15
250k⍀
12V
100nF
100nF
Test Circuit 3. Closed-Loop Output Voltage Accuracy
–6–
REV. 0