2. The Symmetrical Array
At the heart of the Atmel architecture is a symmetrical array of identical cells, seeFigure 2-1. The array is
continuous from one edge to the other, except for bus repeaters spaced every four cells, see Figure 2-2. At the
intersection of each repeater row and column, there is a 32 x 4 RAM block accessible by adjacent buses. The RAM
can be configured as either a single-ported or dual-ported RAM*, with either synchronous or asynchronous
operation.
*The right-most column can only be used as single-port RAM.
Figure 2-1. Symmetrical Array Surrounded by I/O (AT40K20AL)(1)
= I/O Pad
= AT40K Cell
= Repeater Row
= Repeater Column
= FreeRAM
Note: 1. AT40KAL has registered I/Os. Group enable on every sector for tri-states on obufe’s.
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AT40KAL Series FPGA [Datasheet]
Atmel-2818G-FPGA-AT40KAL-Series-Datasheet_092013