Philips Semiconductors
N-channel dual-gate MOS-FETs
Product specification
BF1211; BF1211R; BF1211WR
102
handbook, halfpage
yis
(mS)
10
1
MDB841
bis
10−1
10
gis
102
103
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.17 Input admittance as a function of frequency;
typical values.
103
handbook, halfpage
|yrs|
(µS)
102
10
MDB842 −103
ϕrs
(deg)
ϕrs
−102
|yrs|
−10
1
10
102
103 −1
f (MHz)
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.18 Reverse transfer admittance and phase as
a function of frequency; typical values.
102
handbook, halfpage
|yfs|
(mS)
10
MDB843 −102
ϕfs
(deg)
|yfs|
−10
ϕfs
10
handbook, halfpage
yos
(mS)
1
10−1
MDB844
bos
gos
1
10
−1
102
103
f (MHz)
10−2
10
102
f (MHz)
103
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.19 Forward transfer admittance and phase as
functions of frequency; typical values.
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
Fig.20 Output admittance as a function of
frequency; typical values.
2003 Dec 16
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