NXP Semiconductors
BF1218
Dual N-channel dual gate MOSFET
28
ID
(mA)
20
12
001aac197
102
bis, gis
(mS)
10
1
10−1
001aaa564
bis
gis
4
0
10
20
30
40
50
gain reduction (dB)
10−2
10
102
103
f (MHz)
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; f = 50 MHz;
Tamb = 25 C; see Figure 33.
Fig 12. Amplifier A: drain current as a function of gain
reduction; typical values
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V;
ID(A) = 19 mA
Fig 13. Amplifier A: input admittance as a function of
frequency; typical values
102
Yfs
(mS)
10
1
001aag358 −102
Yfs
ϕfs
(deg)
−10
ϕfs
−1
103
yrs
(mS)
102
10
−ϕrs
yrs
001aaa566 103
−ϕrs
(deg)
102
10
10−1
10
−10−1
102
103
f (MHz)
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V;
ID(A) = 19 mA
Fig 14. Amplifier A: forward transfer admittance and
phase as a function of frequency; typical
values
1
1
10
102
103
f (MHz)
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V;
ID(A) = 19 mA
Fig 15. Amplifier A: reverse transfer admittance and
phase as a function of frequency; typical
values
BF1218_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 April 2010
© NXP B.V. 2010. All rights reserved.
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