C8051F043 Ver la hoja de datos (PDF) - Silicon Laboratories

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C8051F043

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

25.3. Debug Support

Each MCU has on-chip JTAG and debug logic that provides non-intrusive, full speed, in-circuit debug sup-

port using the production part installed in the end application, via the four pin JTAG I/F. Silicon Labs' debug

system supports inspection and modification of memory and registers, breakpoints, and single stepping.

No additional target RAM, program memory, or communications channels are required. All the digital and

analog peripherals are functional and work correctly (remain synchronized) while debugging. The Watch-

dog Timer (WDT) is disabled when the MCU is halted during single stepping or at a breakpoint.

The C8051F040DK is a development kit with all the hardware and software necessary to develop applica-

tion code and perform in-circuit debug with each MCU in the C8051F04x family. Each kit includes an Inte-

grated Development Environment (IDE) which has a debugger and integrated 8051 assembler. The kit

also includes a JTAG interface module referred to as the Serial Adapter. There is also a target application

board with a C8051F040 installed. The required cables and wall-mount power supply are also included.

324

Rev. 1.5

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