CMX813 Ver la hoja de datos (PDF) - CML Microsystems Plc
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CMX813 Datasheet PDF : 21 Pages
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Multi-Standard Analogue Paging Decoder
1.7.1 Electrical Performance (continued)
"C-BUS" Timings (See Figure 3 and Note 9)
tCSE
tCSH
tLOZ
CSN-Enable to Clock-High time
Last Clock-High to CSN-High time
Clock-Low to Reply Output enable
time
tHIZ
tCSOFF
tNXT
tCK
tCH
tCL
tCDS
tCDH
tRDS
tRDH
CSN-High to Reply Output 3-state time
CSN-High Time between transactions
Inter-Byte Time
Clock-Cycle time
Serial Clock-High time
Serial Clock-Low time
Command Data Set-Up time
Command Data Hold time
Reply Data Set-Up time
Reply Data Hold time
Notes
Min.
100
100
0.0
-
1.0
500
500
200
200
75
25
75
0
CMX813
Typ.
-
-
-
-
-
-
-
-
-
-
-
-
-
Max. Unit
-
ns
-
ns
-
ns
1.0
µs
-
µs
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
Figure 3 "C-BUS" Timing
Notes:
5. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the
peripheral MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB
(Bit 7) first, LSB (Bit 0) last.
6. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge.
7. Loaded commands are acted upon at the end of each command.
8. To allow for differing µController serial interface formats "C-BUS" compatible ICs are able to
work with either polarity SERIAL CLOCK pulses.
9. These timings are for the latest version of the "C-BUS" as embodied in the CMX813, and allow
faster transfers than the original "C-BUS" timings given in CML Publication D/800/Sys/3 July
1994.
© 2000 Consumer Microcircuits Limited
20
D/813/33
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