CY8C54LP Ver la hoja de datos (PDF) - Cypress Semiconductor

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componentes Descripción

Fabricante

CY8C54LP

Programmable System-on-Chip (PSoC®)

Cypress Semiconductor 

PRELIMINARY

PSoC® 5LP: CY8C54LP Family

Datasheet

Figure 4-1. ARM Cortex-M3 Block Diagram

Interrupt Inputs

Nested

Vectored

Interrupt

Controller

(NVIC)

JTAG/SWD Debug Block

(Serial and

JTAG)

32 KB

SRAM

Bus

Matrix

Cortex M3 CPU Core

Data

Watchpoint and

Trace (DWT)

Embedded

Trace Module

(ETM)

I- Bus D-Bus

C- Bus

S- Bus

Instrumentation

Trace Module

(ITM)

Cortex M3 Wrapper

Flash Patch

and Breakpoint

(FPB)

Trace Port

Interface Unit

(TPIU)

Trace Pins:

5 for TRACEPORT or

1 for SWV mode

AHB

AHB

Bus

Matrix

Cache

256 KB

ECC

Flash

32 KB

SRAM

Bus

Matrix

AHB Spokes

AHB

AHB Bridge & Bus Matrix

PHUB

DMA

GPIO &

EMIF

Prog.

Digital

Prog.

Analog

Peripherals

Special

Functions

Document Number: 001-84934 Rev. **

Page 11 of 117

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