DM9000
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
■ Supports processor interface: byte/word/dword of
I/O command to internal memory data operation
■ Integrated 10/100M transceiver
■ Supports MII and reverses MII interface
■ Supports back pressure mode for half-duplex
mode flow control
■ IEEE802.3x flow control for full-duplex mode
■ Supports wakeup frame, link status change and
magic packet events for remote wake up
■ Integrated 4K dword SRAM
■ Supports automatically load vendor ID and
product ID from EEPROM
■ Supports 4 GPIO pins
■ Optional EEPROM configuration
■ Very low power consumption mode:
– Power reduced mode (cable detection)
– Power down mode
– Selectable TX drivers for 1:1 or 1.25:1
transformers for additional power reduction.
■ Compatible with 3.3V and 5.0V tolerant I/O
■ 100-pin LQFP with CMOS process
Final
4
Version: DM9000-DS-F03
April 23, 2009