EVB71122-915-C(2015) Ver la hoja de datos (PDF) - Melexis Microelectronic Systems

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EVB71122-915-C
(Rev.:2015)

300 to 930MHz Receiver Evaluation Board Description

Melexis Microelectronic Systems  

EVB71122

300 to 930MHz Receiver

Evaluation Board Description

3.1.2 Control Word R1

Name

CPCUR

PFDPOL

LDERR

LDTIME

RSSIGAIN

VCORANGE

VCOCUR

VCOBUF

PRESCUR

SHOWLD

Bits

[1:0]

[2]

[3]

[5:4]

[6]

[7]

[8]

[9]

[10]

[11]

Description

charge pump current setting

00 100µA

01 400µA

10 400µA static down

11 400µA static up

#default

PFD output polarity

0 negative

1 positive

#default

lock detector time error

0 15ns

1 30ns

#default

lock detection time

00 2/fR

01 4/fR

10 8/fR

11 16/fR

#default

minimum time span before lock in

fR is the reference oscillator frequency fRO divided by R, see section 3.1.5 (R4)

sensitivity of RSSI voltage

0 low gain

1 high gain

(~39mV/dB)

(~51mV/dB)

#default

VCO range

0 3V supply

1 5V supply

VCO range setting for different VCCs.

#default

0 450µA

1 520µA

VCO core current

#default

0 900µA

1 1040µA

VCO buffer current

#default

0 20µA

1 30µA

prescaler 32/33 reference current

#default

30µA may be used for fRF = 868/915MHz

function of LDRSSIL bit

0 RSSIL (RSSI low flag)

1 LD (lock detection flag)

#default

select output data of LDRSSIL, see section 3.1.8 (R7)

39012 71122 01

Rev. 005

Page 17 of 31

EVB Description

Nov/15

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