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FAN5400 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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FAN5400 Datasheet PDF : 37 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
I2C Timing Specifications
Guaranteed by design.
Symbol
Parameter
fSCL SCL Clock Frequency
tBUF
Bus-Free Time between STOP
and START Conditions
tHD;STA
START or Repeated START
Hold Time
tLOW SCL LOW Period
tHIGH SCL HIGH Period
tSU;STA Repeated START Setup Time
tSU;DAT Data Setup Time
tHD;DAT Data Hold Time
tRCL SCL Rise Time
tFCL SCL Fall Time
tRDA
tRCL1
SDA Rise Time
Rise Time of SCL after a
Repeated START Condition
and after ACK Bit
Conditions
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
Standard Mode
Fast Mode
High-Speed Mode
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
High-Speed Mode
Standard Mode
Fast Mode
High-Speed Mode
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
© 2009 Fairchild Semiconductor Corporation
FAN5400 Family • Rev. 1.0.7
9
Min. Typ.
4.7
1.3
4
600
160
4.7
1.3
160
320
4
600
60
120
4.7
600
160
250
100
10
0
0
0
0
20+0.1CB
20+0.1CB
10
20
20+0.1CB
20+0.1CB
10
20
20+0.1CB
20+0.1CB
10
20
Max. Units
100
400
kHz
3400
1700
s
s
ns
ns
s
s
ns
ns
s
ns
ns
ns
s
ns
ns
ns
3.45 s
900 ns
70 ns
150 ns
1000
300
ns
80
160
300
300
ns
40
80
1000
300
ns
80
160
Continued on the following page…
www.fairchildsemi.com

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