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85301AG

2:1 DIFFERENTIAL-TO-LVPECL MULTIPLEXER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS85301

2:1

DIFFERENTIAL-TO-LVPECL MULTIPLEXER

GENERAL DESCRIPTION

The ICS85301 is a high performance 2:1 Differ-

ICS

ential-to-LVPECL Multiplexer and a member of the

HiPerClockS™ HiPerClockS™family of High Performance Clock

Solutions from ICS. The ICS85301 can also per-

form differential translation because the differ-

ential inputs accept LVPECL, CML as well as LVDS levels.

The ICS85301 is packaged in a small 3mm x 3mm

16 VFQFN package, making it ideal for use on space con-

strained boards.

FEATURES

• 2:1 LVPECL MUX

• One LVPECL output

• Two differential clock inputs can accept: LVPECL, LVDS,

CML

• Maximum input/output frequency: 3GHz

• Translates LVCMOS/LVTTL input signals to LVPECL levels

by using a resistor bias network on nPCLK0, nPCLK0

• Propagation delay: 490ps (maximum)

• Part-to-part skew: 150ps (maximum)

• Additive phase jitter, RMS: 0.009ps (typical)

• Full 3.3V or 2.5V operating supply

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS compliant

packages

BLOCK DIAGRAM

PIN ASSIGNMENT

PCLK0

nPCLK0

PCLK1

nPCLK1

CLK_SEL

VBB

85301AK

0

Q

nQ

1

16 15 14 13

PCLK0 1

12 VEE

nPCLK0 2

11 Q

PCLK1 3

10 nQ

nPCLK1 4

9 VEE

5678

ICS85301

16-Lead VFQFN

3mm x 3mm x 0.95 package body

K Package

Top View

PCLK0 1

nPCLK0 2

PCLK1 3

nPCLK1 4

VBB 5

CLK_SEL 6

nc 7

VCC 8

16 nc

15 VEE

14 VEE

13 VCC

12 VEE

11 Q

10 nQ

9 VEE

ICS85301

16-Lead TSSOP

4.4mm x 5.0mm x 0.92mm

package body

G Package

Top View

www.icst.com/products/hiperclocks.html

1

REV. A JANUARY 16, 2006

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