IDT70121 Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT70121 Datasheet PDF : 16 Pages
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IDT70121/IDT70125
High-Speed 2K x 9 Dual-Port Static RAM with Busy & Interrupt
Data Retention Characteristics (L Version Only)
Symbol
Parameter
Test Condition
VDR
VCC for Data Retention
ICCDR
tCDR(3)
Data Retention Current
Chip Deselect to Data Retention Time
VCC = 2V, CE > VCC - 0.2V
VIN > VCC - 0.2V or VIN < 0.2
tR(3)
Operation Recovery Time
NOTES:
1. VCC = 2V, TA = +25°C, and are not production tested.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed but is not production tested.
Industrial and Commercial Temperature Ranges
IND.
COM'L.
Min.
2.0
___
___
tRC(2)
Typ.(1)
___
100
100
___
Max. Unit
___
V
4000 µA
1500
___
V
2654 tbl 07
Data Retention Waveform
Vcc
4.5V
tCDR
CE
VIH
DATA RETENTION MODE
VDR ≥ 2V
VDR
4.5V
tR
VIH
2654 drw 03
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
Figures 1 and 2
2654 tbl 08
DATAOUT
BUSY
INT
775Ω
5V
1250Ω
30pF
5V
DATAOUT
775Ω
1250Ω
5pF*
Figure 1. AC Output Test Load
2654 drw 04
Figure 2. Output Test Load
(For tLZ, tHZ, tWZ, tOW)
*Including scope and jig.
5
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