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IDT7217L25C

16 x 16 PARALLEL CMOS MULTIPLIERS

Integrated Device Technology 

IDT7216L, IDT7217L

16 x 16 PARALLEL CMOS MULTIPLIERS

MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN DESCRIPTIONS

Pin Name

X0 - X15

Y0 - Y15/

P0 - P15

P16 - P31

OEL

OEP

XM, YM

RND

MSPSEL

FA

FT

CLK

CLKX

CLKY

CLKL

CLKM

ENX

ENY

I/O

Description

I Data Inputs

I/O Y0 - Y15 are data inputs

P0 - P15 are LSP register output, enabled when OEL = 0

O Data Output (LSP or MSP)

I Output enable control for LSP (least significant product). When low enables P0 - P15. When high P0 - P15

tristated.

I Output enable control for MSP (most significant product). When low enables P16 - P31. When high P16 -

P31 tristated.

I Mode control for each data word. Low designates unsigned data input and high designates two's

complement.

I "Round" control for rounding of MSP. When high, 1 is added to the most significant bit of LSP. This

signal is affected by the state of FA pin. When FA = 1 and RND = 1, 1 is added to the 2-15 bit (P15). When

RND = 1 and FA = 0, 1 is added to the 2-16 bit (P14). The RND input is registered. It is clocked on the

rising edge of the logical OR of CLKX and CLKY in the 7216 and on the rising edge of CLK in the 7217.

Rounding always occurs in the positive direction which may introduce a systematic bias.

I When low, MSP is output on P16 - P31 lines. When high, LSP is output on P16 - P31.

I Format adjust control. When high, a full 32 bit product is selected. When low, a left shifted 31 bit product

is selected with the sign bit replicated in the LSP. FA is normally high, except for certain fractional two's

complement applications (see multiplier input / output formats).

I Flow through control. When high, both MSP and LSP registers are by-passed.

I 7217 X, Y, RND, LSP and MSP register clock input.

I 7216 X register clock input. Also clocks RND register.

I 7216 Y register clock input. Also clocks RND register.

I 7216 LSP register clock input.

I 7216 MSP register clock input.

I 7217 X register clock enable. Also enables RND register clock.

I 7217 Y register clock enable. Also enables RND register clock.

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Rating

Commercial Military Unit

VCC

Power Supply

–0.5 to +7.0 –0.5 to +7.0 V

Voltage

VTERM

Terminal Voltage

with Respect to

GND

VCC + 0.5

VCC + 0.5 V

TA

Operating

0 to +70 –55 to +125 °C

Temperature

TBIAS Temperature

–55 to +125 –65 to +135 °C

Under Bias

TSTG Storage

–55 to +125 –65 to +150 °C

Temperature

IOUT

DC Output

50

50

mA

Current

NOTE:

2580 tbl 01

1. Stresses greater than those listed under ABSOLUTE MAXIMUM

RATINGS may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other

conditions above those indicated in the operational sections of this

specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

CAPACITANCE (TA = +25°C, f = 1.0 MHz)

Symbol

Parameter(1)

Conditions Max. Unit

CIN

Input Capacitance

VIN = 0V

10 pF

COUT Output Capacitance

VOUT = 0V

12 pF

NOTE:

2580 tbl 04

1. This parameter is measured at characterization and not tested.

11.3

5

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