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ISL6256

Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers

Intersil 

ISL6256, ISL6256A

set point for CSOP-CSON is 165mV. The charger shuts

down if CHLIM is forced below 88mV.

ACLIM

ACLIM is the adapter current limit set pin. ACLIM = VREF for

100mV, ACLIM = Floating for 75mV, and ACLIM = GND for

50mV. Connect a resistor divider to program the adapter

current limit threshold between 50mV and 100mV.

VREF

VREF is a 2.39V reference output pin. It is internally

compensated. Do not connect a decoupling capacitor.

Theory of Operation

Introduction

Note: Unless otherwise noted, all descriptions that refer to

the ISL6256 also refer to the ISL6256A.

The ISL6256 includes all of the functions necessary to

charge 2 to 4 cell Li-Ion and Li-polymer batteries. A high

efficiency synchronous buck converter is used to control the

charging voltage and charging current up to 10A. The

ISL6256 has input current limiting and analog inputs for

setting the charge current and charge voltage; CHLIM inputs

are used to control charge current and VADJ inputs are used

to control charge voltage.

The ISL6256 charges the battery with constant charge

current, set by CHLIM input, until the battery voltage rises up

to a programmed charge voltage set by VADJ input; then the

charger begins to operate at a constant voltage charge mode.

The charger also drives an adapter isolation P-Channel

MOSFET to efficiently switch in the adapter supply.

ISL6256 is a complete power source selection controller for

single battery systems and also aircraft power applications.

It drives a battery selector P-Channel MOSFET to efficiently

select between a single battery and the adapter. It controls

the battery discharging MOSFET and switches to the battery

when the AC adapter is removed, or, switches to the AC

adapter when the AC adapter is inserted for single battery

system.

The EN input allows shutdown of the charger through a

command from a micro-controller. It also uses EN to safely

shutdown the charger when the battery is in extremely hot

conditions. The amount of adapter current is reported on the

ICM output. Figure 1 shows the IC functional block diagram.

The synchronous buck converter uses external N-Channel

MOSFETs to convert the input voltage to the required

charging current and charging voltage. Figure 2 shows the

ISL6256 typical application circuit with charging current and

charging voltage fixed at specific values. The typical

application circuit shown in Figure 3 shows the ISL6256

typical application circuit which uses a micro-controller to

adjust the charging current set by CHLIM input for aircraft

power applications. The voltage at CHLIM and the value of

R1 sets the charging current. The DC/DC converter

generates the control signals to drive two external

N-Channel MOSFETs to regulate the voltage and current set

by the ACLIM, CHLIM, VADJ and CELLS inputs.

The ISL6256 features a voltage regulation loop (VCOMP)

and two current regulation loops (ICOMP). The VCOMP

voltage regulation loop monitors CSON to ensure that its

voltage never exceeds the voltage and regulates the battery

charge voltage set by VADJ. The ICOMP current regulation

loops regulate the battery charging current delivered to the

battery to ensure that it never exceeds the charging current

limit set by CHLIM; and the ICOMP current regulation loops

also regulate the input current drawn from the AC adapter to

ensure that it never exceeds the input current limit set by

ACLIM, and to prevent a system crash and AC adapter

overload.

PWM Control

The ISL6256 employs a fixed frequency PWM current mode

control architecture with a feed-forward function. The

feed-forward function maintains a constant modulator gain of

11 to achieve fast line regulation as the buck input voltage

changes. When the battery charge voltage approaches the

input voltage, the DC/DC converter operates in dropout

mode, where there is a timer to prevent the frequency from

dropping into the audible frequency range. It can achieve

duty cycle of up to 99.6%.

To prevent boosting of the system bus voltage, the battery

charger operates in standard-buck mode when CSOP-CSON

drops below 4.25mV. Once in standard-buck mode, hysteresis

does not allow synchronous operation of the DC/DC converter

until CSOP-CSON rises above 12.5mV.

An adaptive gate drive scheme is used to control the dead

time between two switches. The dead time control circuit

monitors the LGATE output and prevents the upper side

MOSFET from turning on until LGATE is fully off, preventing

cross-conduction and shoot-through. In order for the dead

time circuit to work properly, there must be a low resistance,

low inductance path from the LGATE driver to MOSFET

gate, and from the source of MOSFET to PGND. The

external Schottky diode is between the VDDP pin and BOOT

pin to keep the bootstrap capacitor charged.

Setting the Battery Regulation Voltage

The ISL6256 uses a high-accuracy trimmed band-gap

voltage reference to regulate the battery charging voltage.

The VADJ input adjusts the charger output voltage, and the

VADJ control voltage can vary from 0 to VREF, providing a

10% adjustment range (from 4.2V-5% to 4.2V+5%) on

CSON regulation voltage. An overall voltage accuracy of

better than 0.5% is achieved.

14

FN6499.1

July 19, 2007

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