Micrel, Inc.
Synchronous Timing in Burst Write (VLBUSN = 1)
KSZ8841-16/32 MQL/MVL/MBL
Figure 17. Synchronous Burst Write Cycles – VLBUSN = 1
Symbol Parameter
t1
SWR setup to BCLK falling
t2
DATDCSN setup to BCLK rising
t3
CYCLEN setup to BCLK rising
t4
Write data setup to BCLK rising
t5
Write data hold to BCLK rising
t6
RDYRTNN setup to BCLK falling
t7
RDYRTNN hold to BCLK falling
t8
SRDYN setup to BCLK rising
t9
SRDYN hold to BCLK rising
t10 DATACSN hold to BCLK rising
t11 SWR hold to BCLK falling
t12 CYCLEN hold to BCLK
Min Typ Max Unit
4
ns
4
ns
4
ns
6
ns
2
ns
5
ns
3
ns
4
ns
3
ns
2
ns
2
ns
2
ns
Table 20. Synchronous Burst Write Timing Parameters
October 2007
93
M9999-102207-1.6