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L6920DC Ver la hoja de datos (PDF) - STMicroelectronics

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L6920DC
ST-Microelectronics
STMicroelectronics 
L6920DC Datasheet PDF : 16 Pages
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Detailed description
L6920DC
5.3
Shutdown
In shutdown mode (SHDN pulled low) all internal circuitries are turned off, minimizing the
current provided by the battery (ISHDN < 100 nA, in typical case).
Both switches are turned off, and the low battery comparator output is forced in high
impedance state.
The synchronous switch body diode causes a parasitic path between power supply and
output that can't be avoided also in shutdown.
5.4
Low battery detection
The L6920DC includes a low battery detector comparator.
Threshold is VREF voltage and a hysteresis is added to avoid oscillations when input crosses
the threshold slowly. The LBO is an open drain output so a pull up resistor is required for a
proper use.
5.5
Low battery input
It is possible to fix, using an external resistor divider, the LBO threshold, in order to adapt
the LBO detection at the correct input source, by the following equation:
Equation 2
Vbatt-th = 1.23V ⎝⎛1 + RR-----12--⎠⎞
Where Vbatt-th is the battery voltage at which the internal comparetor is triggered.
5.6
Reverse polarity
A protection circuit has been implemented to avoid that L6920DC and the battery are
destroyed in case of wrong battery insertion.
In addition, this circuit has been designed so that the current required by the battery is zero
also in reverse polarity.
If a battery can be inserted in reverse direction, a non polarized capacitor should be
installed in location of C2.
5.7
Output voltage selection
Output voltage must be selected acting on FB pin.
Three choices are available: fixed 3.3V, 5V or adjustable output set via an external resistor
divider.
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