LNK403-409/413-419
Layout Considerations
Primary Side Connections
Use a single point (Kelvin) connection at the negative terminal of
the input filter capacitor for the SOURCE pin and bias returns.
This improves surge capabilities by returning surge currents
from the bias winding directly to the input filter capacitor. The
BYPASS pin capacitor should be located as close to the
BYPASS pin and connected as close to the SOURCE pin as
possible. The SOURCE pin trace should not be shared with the
main power FET switching currents. All FEEDBACK pin
components that connect to the SOURCE pin should follow the
same rules as the BYPASS pin capacitor. It is critical that the
main power FET switching currents return to the bulk capacitor
with the shortest path as possible. Long high current paths
create excessive conducted and radiated noise.
Secondary Side Connections
The output rectifier and output filter capacitor should be as
close as possible. The transformer’s output return pin should
have a short trace to the return side of the output filter capacitor.
Input EMI Filter
R2
F1
L RV1
N
L1
C2
L2
Bulk Capacitor
R14
L3
C9
Clamp
FL1
LNK403EG
6
1
VR1
2
C3
D1
U1
C8
T1
Transformer
5
4
3
C7
C12
R3
R16
Copper Area for
Heat Sinking
Figure 12. RD-193 7 W Layout Example, Top Layer.
VR3
R24
C14
C5
D8R10
C6
V
BYPASS Pin
Capacitor
Output
C4 Filter
Capacitors
V
PI-5987-060110
www.powerint.com
11
Rev. D 08/11