NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
Table 3. Pin description …continued
Not all functions are available on all parts. See Table 2 (Ethernet, USB, LCD, QEI, SD/MMC, DAC pins) and Table 7 (EMC
pins).
Symbol
Description
P0[8]
P0[9]
P0[10]
P0[11]
P0[12]
160 A15 C12 111 [4] I; IA I/O
I/O
158 C14 A13 109 [4]
I/O
O
I
-
-
O
I; IA I/O
I/O
I/O
O
I
-
-
O
98 T15 L10 69 [3] I; I/O
PU O
I/O
O
100 R14 P12 70 [3] I; I/O
PU I
I/O
O
41 R1 J4 29 [5] I; I/O
PU O
I/O
I
P0[8] — General purpose digital input/output pin.
I2S_TX_WS — I2S Transmit word select. It is driven by the
master and received by the slave. Corresponds to the signal WS
in the I2S-bus specification.
SSP1_MISO — Master In Slave Out for SSP1.
T2_MAT2 — Match output for Timer 2, channel 2.
RTC_EV1 — Event input 1 to Event Monitor/Recorder.
R — Function reserved.
R — Function reserved.
LCD_VD[16] — LCD data.
P0[9] — General purpose digital input/output pin.
I2S_TX_SDA — I2S transmit data. It is driven by the transmitter
and read by the receiver. Corresponds to the signal SD in the
I2S-bus specification.
SSP1_MOSI — Master Out Slave In for SSP1.
T2_MAT3 — Match output for Timer 2, channel 3.
RTC_EV2 — Event input 2 to Event Monitor/Recorder.
R — Function reserved.
R — Function reserved.
LCD_VD[17] — LCD data.
P0[10] — General purpose digital input/output pin.
U2_TXD — Transmitter output for UART2.
I2C2_SDA — I2C2 data input/output (this pin does not use a
specialized I2C pad).
T3_MAT0 — Match output for Timer 3, channel 0.
P0[11] — General purpose digital input/output pin.
U2_RXD — Receiver input for UART2.
I2C2_SCL — I2C2 clock input/output (this pin does not use a
specialized I2C pad).
T3_MAT1 — Match output for Timer 3, channel 1.
P0[12] — General purpose digital input/output pin.
USB_PPWR2 — Port Power enable signal for USB port 2.
SSP1_MISO — Master In Slave Out for SSP1.
ADC0_IN[6] — A/D converter 0, input 6. When configured as an
ADC input, the digital function of the pin must be disabled.
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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