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LT3492

Triple Output LED Driver with 3000:1 PWM Dimming

Linear Technology 

LT3492

APPLICATIONS INFORMATION

this capability. Some margin to data sheet limits is included,

along with provision for 200mA inductor ripple current.

For boost mode converters:

IOUT(MAX)

≅

0.4A

VIN(MIN)

VOUT(MAX)

For buck mode converters:

ILED(MAX) ≅ 0.4A

For SEPIC and buck-boost mode converters:

IOUT(MAX)

≅

0.4A

VIN(MIN)

(VOUT(MAX) + VIN(MIN)

)

If some level of analog dimming is acceptable at minimum

supply levels, then the CTRL pin can be used with a resistor

divider to VIN (as shown in the Block Diagram) to provide

a higher output current at nominal VIN levels.

The LED current of each channel is programmed by con-

necting an external sense resistor RSENSE in series with

the LED load, and setting the voltage regulation threshold

across that sense resistor using CTRL input. If the CTRL

voltage, VCTRL, is less than 1V, the LED current is:

ILED

=

10

VCTRL

• RSENSE

If VCTRL is higher than 1V, the LED current is:

ILED

=

100mV

RSENSE

The CTRL pins should not be left open. The CTRL pin

can also be used in conjunction with a PTC thermistor to

provide overtemperature protection for the LED load as

shown in Figure 2.

2V

VREF

45k

50k

CTRL1-3

470Ω

PTC

3492 F02

Figure 2

Thermal Considerations

The LT3492 is rated to a maximum input voltage of 30V

for continuous operation, and 40V for nonrepetitive one

second transients. Careful attention must be paid to the

internal power dissipation of the LT3492 at higher input

voltages and higher switching frequencies/output voltage

to ensure that a junction temperature of 125°C is not

exceeded. This is especially important when operating

at high ambient temperatures. Consider driving VIN from

5V or higher to ensure the fastest switching edges, and

minimize one source of switching loss. The exposed

pad on the bottom of the package must be soldered to

a ground plane. This ground should then be connected

to an internal copper ground plane with thermal vias

placed directly under the package to spread out the heat

dissipated by the LT3492.

Board Layout

The high speed operation of the LT3492 demands careful

attention to board layout and component placement. The

exposed pad of the package is the only GND terminal of

the IC and is important for thermal management of the

IC. Therefore, it is crucial to achieve a good electrical and

thermal contact between the exposed pad and the ground

plane of the board. Also, in boost configuration, the

Schottky rectifier and the capacitor between GND and the

cathode of the Schottky are in the high frequency switching

path where current flow is discontinuous. These elements

should be placed so as to minimize the path between SW

and the GND of the IC. To reduce electromagnetic interfer-

ence (EMI), it is important to minimize the area of the SW

node. Use the GND plane under SW to minimize interplane

coupling to sensitive signals. To obtain good current

regulation accuracy and eliminate sources of channel to

channel coupling, the ISP and ISN inputs of each channel

of the LT3492 should be run as separate lines back to the

terminals of the sense resistor. Any resistance in series

with ISP and ISN inputs should be minimized. Avoid ex-

tensive routing of high impedance traces such as OVP and

VC. Make sure these sensitive signals are star coupled to

the GND under the IC rather than a GND where switching

currents are flowing. Finally, the bypass capacitor on the

VIN supply to the LT3492 should be placed as close as

possible to the VIN terminal of the device.

3492f

11

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