LTC6104H Ver la hoja de datos (PDF) - Linear Technology
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LTC6104H Datasheet PDF : 16 Pages
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BLOCK DIAGRAM
– VSENSE +
RINB
RSENSE
ILOAD
RINA
8
7
+INA –INA
5k
5k
VS
10V
10V
6
5
–INB +INB
5k
5k
LTC6104
V–
A
V+
–+
V+
B
V–
10V
OUT
V–
1
4
VOUT
VOUT
=
VSENSE
•
ROUT
RIN
+
VREF
ROUT
+– VREF
6104 F01
Figure 1. LTC6104 Block Diagram
THEORY OF OPERATION
When VSENSE is positive, an internal sense amplifier loop
forces –INA to have the same potential as +INA. Connect-
ing an external resistor, RINA, in series with –INA causes
a current, VSENSE/RINA, to flow through RINA. The high
impedance inputs of the sense amplifier will not conduct
this input current, so the current will flow through an
internal MOSFET to the OUT pin.
The output current can be transformed into a voltage by
adding a resistor from OUT to a reference voltage (VREF). The
output voltage is then VOUT = (VSENSE/RINA) • ROUT + VREF.
When operating on a dual supply, ROUT can be tied to ground.
The output voltage is then VOUT = (VSENSE/RINA) • ROUT.
Only one amplifier is active at a time in the LTC6104. If the
load current direction (VSENSE is negative) activates the
“B” amplifier, the “A” amplifier will be inactive. The signal
current goes into the –INB pin, through the MOSFET, and
into the current mirror. The mirror reverses the polarity of
the signal so that current flows into the “OUT” pin, causing
the output voltage to change polarity. The magnitude of the
output is then VSENSE • ROUT/RINB + VREF. Keep in mind
that the OUT voltage cannot swing below V–, even though
it’s sinking current. A proper VREF and ROUT need to be
chosen so that the designed OUT voltage swing does not
go beyond the specified voltage range of the output.
Supply current is drawn from +INB pin. The user may
choose to include this current in the monitored current
through RSENSE by careful choice of connection polarity.
6104f
7
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